US 12,237,009 B2
Sense amplifier circuit, memory circuit, and sensing method thereof
Jui-Jen Wu, Hsinchu (TW); Jen-Chieh Liu, Hsinchu (TW); Yi-Lun Lu, New Taipei (TW); Win-San Khwa, Taipei (TW); and Meng-Fan Chang, Taichung (TW)
Assigned to Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed on Jun. 22, 2022, as Appl. No. 17/846,035.
Prior Publication US 2023/0420041 A1, Dec. 28, 2023
Int. Cl. G11C 11/00 (2006.01); G11C 11/418 (2006.01); G11C 11/419 (2006.01)
CPC G11C 11/419 (2013.01) [G11C 11/418 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A sense amplifier circuit, comprising:
a differential amplifier, comprising a first input node, a second input node, a first output node and a second output node, wherein the differential amplifier amplifies a voltage difference of the first output node and the second output node according to a first input voltage of the first input node and a second input voltage of the second input node;
a first switch, wherein a control node of the first switch is coupled to a control line, a first node of the first switch is coupled to the first input node, and a second node of the first switch is coupled to the first output node, the first switch is configured to pre-charge the first input node by a first output voltage of the first output node while the control line is received a select signal where the sense amplifier circuit is enabled by the select signal; and
a second switch, wherein a control node of the second switch is coupled to the control line, a first node of the second switch is coupled to the second input node, and a second node of the second switch is coupled to the second output node, the second switch is configured to pre-charge the second input node by a second output voltage of the second output node while the control line is received the select signal where the sense amplifier circuit is enabled by the select signal.