US 12,236,992 B2
Refresh determination using memory cell patterns
Umberto di Vincenzo, Capriate San Gervasio (IT); Ferdinando Bedeschi, Biassono (IT); and Christian Marc Benoit Caillat, Boise, ID (US)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by Micron Technology, Inc., Boise, ID (US)
Filed on Jun. 28, 2022, as Appl. No. 17/852,221.
Prior Publication US 2023/0420025 A1, Dec. 28, 2023
Int. Cl. G11C 11/40 (2006.01); G11C 11/406 (2006.01); G11C 11/4074 (2006.01); G11C 11/4096 (2006.01)
CPC G11C 11/40615 (2013.01) [G11C 11/40622 (2013.01); G11C 11/4074 (2013.01); G11C 11/4096 (2013.01)] 21 Claims
OG exemplary drawing
 
1. A system comprising:
a memory array comprising pattern cells and data cells, wherein each of the pattern cells is configured to store only a first logic state;
sensing circuitry configured to read the pattern cells; and
a controller configured to:
store a codeword in the data cells;
apply first voltages to the pattern cells;
determine, using the sensing circuitry, that at least a portion of the pattern cells switch;
determine, based on the portion of the pattern cells that switch, to refresh the codeword; and
apply the refresh of the codeword.