US 12,236,912 B2
Display panel, driving method for the display panel and display device
Yanping Liao, Beijing (CN); Yingmeng Miao, Beijing (CN); Seungmin Lee, Beijing (CN); Xibin Shao, Beijing (CN); Shulin Yao, Beijing (CN); Yinlong Zhang, Beijing (CN); Qiujie Su, Beijing (CN); Cong Wang, Beijing (CN); Dongchuan Chen, Beijing (CN); and Jiantao Liu, Beijing (CN)
Assigned to BEIJING BOE DISPLAY TECHNOLOGY CO., LTD., Beijing (CN); and BOE TECHNOLOGY GROUP CO., LTD., Beijing (CN)
Appl. No. 17/915,712
Filed by BEIJING BOE DISPLAY TECHNOLOGY CO., LTD., Beijing (CN); and BOE TECHNOLOGY GROUP CO., LTD., Beijing (CN)
PCT Filed Oct. 28, 2021, PCT No. PCT/CN2021/126857
§ 371(c)(1), (2) Date Sep. 29, 2022,
PCT Pub. No. WO2022/213583, PCT Pub. Date Oct. 13, 2022.
Claims priority of application No. 202110381834.1 (CN), filed on Apr. 9, 2021.
Prior Publication US 2024/0212643 A1, Jun. 27, 2024
Int. Cl. G09G 3/36 (2006.01); G09G 3/3266 (2016.01); G11C 19/28 (2006.01)
CPC G09G 3/3677 (2013.01) [G09G 3/3266 (2013.01); G09G 2310/0213 (2013.01); G09G 2310/0227 (2013.01); G09G 2310/0267 (2013.01); G09G 2310/0286 (2013.01); G09G 2310/08 (2013.01); G11C 19/28 (2013.01)] 18 Claims
OG exemplary drawing
 
1. A display panel, comprising a gate driving circuit and N trigger signal lines, wherein
the gate driving circuit comprises shift registers of a plurality of stages arranged in sequence, the shift registers of the plurality of stages arranged in sequence are combined into N groups of gate driving sub-circuits, and shift registers in the N groups of gate driving sub-circuits are cascaded, respectively, wherein the N trigger signal lines are connected to N groups of gate driving sub-circuits, respectively;
an m-th group of gate driving sub-circuits in the N groups of gate driving sub-circuits comprises a shift register of an m-th stage and a shift register of an (m+L*N)-th stage that are cascaded,
wherein m is an integer that is greater than or equal to 1 and less than or equal to N, L is an integer that is greater than or equal to 1, and N is an even number that is greater than or equal to 2;
wherein an m-th trigger signal line in the N trigger signal lines is connected to an input terminal of the shift register of the m-th stage; and
wherein the shift registers of the plurality of stages arranged in sequence comprise a plurality of dummy shift registers, and input terminals of dummy shift registers of N stages in the plurality of dummy shift registers are respectively connected to the N trigger signal lines to receive trigger signals.