CPC G09G 3/3275 (2013.01) [H10K 59/1201 (2023.02); H10K 59/1213 (2023.02); H10K 59/131 (2023.02); H10K 71/60 (2023.02); G09G 2300/0426 (2013.01); G09G 2310/08 (2013.01); G09G 2330/023 (2013.01)] | 20 Claims |
1. A display panel, comprising:
a display area comprising a plurality of pixel units distributed in an array, wherein the plurality of pixel units comprise at least a first sub-pixel and a second sub-pixel, and a maximum grayscale value voltage of the first sub-pixel is less than a maximum grayscale value voltage of the second sub-pixel;
a source driver circuit on a side of the display area, wherein the source driver circuit is configured to output a data signal and a switch control signal; and
a switching circuit on a side of the display area, wherein the switching circuit comprises a plurality of switching units, a control end of the switching unit is configured to receive the switch control signal, a first end of the switching unit is configured to receive the data signal, and a second end of the switching unit is connected to a data line;
wherein the first sub-pixel in a nth column of pixel units and the first sub-pixel in a (n+1)th column of pixel units are connected to two adjacent switching units through data lines, respectively, n being an odd number greater than or equal to 1.
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