US 12,236,897 B2
Display substrate
Xing Yao, Beijing (CN); Chen Xu, Beijing (CN); Jingquan Wang, Beijing (CN); and Xinyin Wu, Beijing (CN)
Assigned to BOE TECHNOLOGY GROUP CO., LTD., Beijing (CN)
Filed by BOE TECHNOLOGY GROUP CO., LTD., Beijing (CN)
Filed on Mar. 28, 2024, as Appl. No. 18/620,521.
Application 18/620,521 is a continuation of application No. 18/302,056, filed on Apr. 18, 2023, granted, now 11,978,404.
Application 18/302,056 is a continuation of application No. 17/363,639, filed on Jun. 30, 2021, granted, now 11,663,976.
Claims priority of application No. 202010889271.2 (CN), filed on Aug. 28, 2020.
Prior Publication US 2024/0312419 A1, Sep. 19, 2024
Int. Cl. G09G 3/3266 (2016.01); H10K 59/126 (2023.01); H10K 59/131 (2023.01)
CPC G09G 3/3266 (2013.01) [H10K 59/126 (2023.02); H10K 59/131 (2023.02); G09G 2300/0426 (2013.01); G09G 2310/0286 (2013.01)] 16 Claims
OG exemplary drawing
 
1. A display substrate, comprising:
a base substrate, comprising a display region and a peripheral region on at least one side of the display region;
a gate scan driving circuit, a light-emitting control scan driving circuit, and a first power line in the peripheral region of the base substrate and arranged in sequence along a side of the peripheral region away from the display region, wherein an output terminal of the gate scan driving circuit is electrically connected to at least one data writing transistor in the display region, the gate scan driving circuit is configured to output a gate scan signal, the data writing transistor is configured to control the writing of a data signal in response to the gate scan signal, an output terminal of the light-emitting control scan driving circuit is electrically connected to at least one light-emitting control transistor in the display region, the light-emitting control scan driving circuit is configured to output a light-emitting control signal, the light-emitting control transistor is configured to control a light-emitting element to emit light in response to the light-emitting control signal, and the first power line is electrically connected to a cathode of at least one light-emitting element in the display region;
a first planarization layer and a second planarization layer, wherein the first planarization layer and the second planarization layer further comprise an open slot provided between the light-emitting control scan driving circuit and the gate scan driving circuit; and
a first shielding layer and a second shielding layer which are sequentially arranged on a side of the light-emitting control scan driving circuit away from the base substrate;
wherein the second shielding layer extends from a region corresponding to the light-emitting control scan driving circuit to a region corresponding to the gate scan driving circuit and covers the open slot; and
in an area where the second shielding layer is close to the open slot, an orthographic projection of the second shielding layer covering the open slot on the base substrate at least overlaps with an orthographic projection of the first shielding layer on the base substrate.