CPC G09G 3/3233 (2013.01) [H10K 59/88 (2023.02); G09G 2300/0413 (2013.01)] | 20 Claims |
1. A display panel comprising:
a plurality of active pixels comprising a first active pixel to an N-th active pixel, N being a natural number of 4 or more; and
a dummy pixel arranged adjacent to the N-th active pixel in a same pixel column, the dummy pixel comprising:
a dummy driving transistor comprising a gate electrode connected to a first node, a first electrode connected to a data line configured to transmit a data voltage, and a second electrode connected to a second node;
a plurality of dummy compensation transistors connected in parallel to each other between the first node and the second node;
a dummy initialization transistor comprising a gate electrode configured to receive an initialization gate signal, a first electrode configured to receive an initialization voltage, and a second electrode connected to the first node; and
a dummy storage capacitor comprising a first electrode configured to receive a first supply voltage and a second electrode connected to the first node.
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