US 12,236,863 B2
OLED display with protection circuit
John Hamer, Rochester, NY (US); Jeffrey Spindler, Ontario, NY (US); Marina Kondakova, Kendall, NY (US); Bernd Richter, Dresden (DE); Philipp Wartenberg, Dresden (DE); Gerd Bunk, Dresden (DE); and Uwe Vogel, Dresden (DE)
Assigned to OLEDWorks LLC, Rochester, NY (US); and Fraunhofer-Gesellschaft e.V., Munich (DE)
Appl. No. 17/601,531
Filed by OLEDWorks LLC, Rochester, NY (US); and Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V., Munich (DE)
PCT Filed Jan. 26, 2021, PCT No. PCT/US2021/015038
§ 371(c)(1), (2) Date Oct. 5, 2021,
PCT Pub. No. WO2021/154693, PCT Pub. Date Aug. 5, 2021.
Claims priority of provisional application 63/054,387, filed on Jul. 21, 2020.
Claims priority of provisional application 62/966,757, filed on Jan. 28, 2020.
Prior Publication US 2022/0208871 A1, Jun. 30, 2022
Int. Cl. G09G 3/3233 (2016.01); H10K 50/13 (2023.01); H10K 50/19 (2023.01); H10K 50/852 (2023.01); H10K 59/12 (2023.01); H10K 59/121 (2023.01); H10K 59/123 (2023.01); H10K 59/131 (2023.01); H10K 59/32 (2023.01); H10K 59/80 (2023.01); H10K 102/00 (2023.01)
CPC G09G 3/3233 (2013.01) [H10K 50/13 (2023.02); H10K 50/19 (2023.02); H10K 50/852 (2023.02); H10K 59/12 (2023.02); H10K 59/1213 (2023.02); H10K 59/123 (2023.02); H10K 59/131 (2023.02); H10K 59/32 (2023.02); H10K 59/876 (2023.02); G09G 2300/0426 (2013.01); G09G 2300/0842 (2013.01); G09G 2300/0861 (2013.01); G09G 2330/04 (2013.01); H10K 2102/3026 (2023.02)] 22 Claims
OG exemplary drawing
 
1. A display comprising a light emitting OLED stack on top of a silicon-based backplane with individually addressable pixels and control circuitry wherein:
the control circuitry of the silicon-based backplane comprises at least one driving transistor where a first terminal of the driving transistor is electrically connected to an external power source VDD, and the second terminal of the driving transistor is electrically connected to a segmented bottom electrode of the OLED stack; wherein the gate of the driving transistor is controlled by a data signal which is supplied by a scan transistor controlled by a signal from a first select line; and
the control circuitry additionally comprises a protection circuit comprising a bipolar junction transistor with a collector terminal electrically connected to external power source VDD.