a data writing circuit, coupled to a first gate signal terminal, a second gate signal terminal, a third gate signal terminal, a data signal terminal, a first node, a second node and a third node, wherein the data writing circuit is configured to control conduction/non-conduction between the data signal terminal and the first node and conduction/non-conduction between the second node and the third node in response to a first gate driving signal provided by the first gate signal terminal, a second gate driving signal provided by the second gate signal terminal, and a third gate driving signal provided by the third gate signal terminal; wherein a first parasitic capacitance is formed between the second gate signal terminal and the second node, and a second parasitic capacitance is formed between the third gate signal terminal and the second node;

a light emission control circuit, coupled to a light emission control terminal, a first power supply terminal, the first node, the third node and a light-emitting element, wherein the light emission control circuit is configured to control conduction/non-conduction between the first power supply terminal and the first node and conduction/non-conduction between the third node and the light-emitting element in response to a light emission control signal provided by the light emission control terminal; and

a drive circuit, wherein an input terminal, a control terminal and an output terminal of the drive circuit are coupled to the first node, the second node and the third node respectively, and the drive circuit is configured to transmit a light emission driving signal to the third node based on a potential at the first node and a potential at the second node.