| CPC G09G 3/2092 (2013.01) [G09G 2310/0297 (2013.01)] | 20 Claims |
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1. A display panel, wherein a demultiplexing circuit is disposed in the display panel, and the demultiplexing circuit comprises at least:
an N−1th stage demultiplexing subcircuit, wherein the N−1th stage demultiplexing subcircuit comprises at least M N−1th stage demultiplexing units configured to respond to N−1th stage control signals to time-sharingly output corresponding N−1th stage data signals; and
an Nth stage demultiplexing subcircuit, wherein the Nth stage demultiplexing subcircuit comprises at least M+1 Nth stage demultiplexing units configured to respond to Nth stage control signals to time-sharingly output corresponding Nth stage data signals, and an input terminal of the Nth stage demultiplexing subcircuit is connected to an output terminal of the N−1th stage demultiplexing subcircuit,
wherein an output terminal of at least one of the N−1th stage demultiplexing units is connected to input terminals of at least two ones of the Nth stage demultiplexing units, and M and N are both integers not less than 2.
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