US 12,236,178 B2
Methods of generating circuit models and manufacturing integrated circuits using the same
Yohan Kim, Gwacheon-si (KR); Changwook Jeong, Hwaseong-si (KR); and Jisu Ryu, Hwaseong-si (KR)
Assigned to Samsung Electronics Co., Ltd., (KR)
Filed by Samsung Electronics Co., Ltd., Suwon-si (KR)
Filed on Oct. 18, 2021, as Appl. No. 17/503,558.
Claims priority of application No. 10-2020-0135524 (KR), filed on Oct. 19, 2020.
Prior Publication US 2022/0121800 A1, Apr. 21, 2022
Int. Cl. G06F 30/367 (2020.01); G06F 18/20 (2023.01); G06F 119/06 (2020.01); G06N 7/01 (2023.01)
CPC G06F 30/367 (2020.01) [G06F 18/285 (2023.01); G06N 7/01 (2023.01); G06F 2119/06 (2020.01)] 16 Claims
OG exemplary drawing
 
1. A method of generating a circuit model used to simulate an integrated circuit, the method comprising:
generating first feature element data and second feature element data by classifying feature data of a target semiconductor device according to measurement conditions, wherein the first feature element data and the second feature element data are based on feature elements independent to each other;
generating first target data and second target data by preprocessing the first feature element data and the second feature element data, respectively;
extracting a first machine learning model using the first target data and extracting a second machine learning model using the second target data; and
generating the circuit model used to simulate the integrated circuit by using the first machine learning model and the second machine learning model.