CPC G06F 3/064 (2013.01) [G06F 3/0604 (2013.01); G06F 3/0619 (2013.01); G06F 3/0659 (2013.01); G06F 3/0679 (2013.01)] | 20 Claims |
1. A system comprising:
a memory device; and
a processing device, operatively coupled with the memory device, to perform operations comprising:
identifying a first set of bits associated with a translation unit of the memory device, wherein the first set of bits corresponds to a page field;
identifying a second set of bits associated with the translation unit of the memory device, wherein the second set of bits corresponds to a block field;
updating a first portion of an address mapping table corresponding to the second set of bits with a value representing a difference between a value stored in the page field and a threshold value;
updating a second portion of the address mapping table corresponding to the first set of bits with a value representing a block number stored in the block field;
determining, based on the updated first portion and the updated second portion of the address mapping table, that a swapping condition is satisfied, wherein the swapping condition indicates that the page field and the block field are swapped; and
responsive to determining that the swapping condition is satisfied, performing a data access operation on a set of memory cells residing at a location corresponding to the translation unit.
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