US 12,236,104 B2
Operation method of memory module, operation method of memory controller, and operation method of memory system
Dae-Jeong Kim, Seoul (KR); Tae-Kyeong Ko, Hwaseong-si (KR); Nam Hyung Kim, Suwon-si (KR); Do-Han Kim, Hwaseong-si (KR); Deokho Seo, Suwon-si (KR); Ho-Young Lee, Osan-si (KR); and Insu Choi, Hwaseong-si (KR)
Assigned to SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed by SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed on Aug. 16, 2022, as Appl. No. 17/889,117.
Claims priority of application No. 10-2021-0129024 (KR), filed on Sep. 29, 2021.
Prior Publication US 2023/0112776 A1, Apr. 13, 2023
Int. Cl. G06F 11/00 (2006.01); G06F 3/06 (2006.01); G06F 11/07 (2006.01)
CPC G06F 3/0619 (2013.01) [G06F 3/0659 (2013.01); G06F 3/0673 (2013.01); G06F 11/0772 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method of a memory controller which is configured to control a memory module including a plurality of memory devices and at least one error correction code (ECC) device, the method comprising:
reading a data set including user data stored in the plurality of memory devices and ECC data stored in the at least one ECC device, based on a read command and a first address; and
writing uncorrectable data in a memory area, which is included in each of the plurality of memory devices and the at least one ECC device and corresponds to the first address, based on an error of the user data not being corrected based on the ECC data,
wherein the writing of the uncorrectable data comprises sending a signal to the memory module indicating the uncorrectable data, and
wherein the signal is an operation code on a command/address bus or the signal is a control voltage provided by the memory controller.