US 12,236,098 B2
Memory device and scheduling method thereof
Nayeon Kim, Suwon-si (KR); Kyungsoo Kim, Suwon-si (KR); Yongsuk Kwon, Suwon-si (KR); Jinin So, Suwon-si (KR); and Kyoungwan Woo, Suwon-si (KR)
Assigned to Samsung Electronics Co., Ltd., (KR)
Filed by Samsung Electronics Co., Ltd., Suwon-si (KR)
Filed on May 24, 2023, as Appl. No. 18/322,798.
Claims priority of application No. 10-2022-0179463 (KR), filed on Dec. 20, 2022.
Prior Publication US 2024/0201858 A1, Jun. 20, 2024
Int. Cl. G06F 3/06 (2006.01)
CPC G06F 3/0613 (2013.01) [G06F 3/0659 (2013.01); G06F 3/0673 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A memory device comprising:
a request register configured to receive a first signal including a requester identifier using a first protocol from a host and configured to output a first priority corresponding to the requester identifier;
a checker module configured to receive a second signal including a command and a request type from the host and using a second protocol that is different than the first protocol, wherein the checker module is configured to receive the first priority from the request register, and wherein the checker module is configured to determine a second priority of the command based on the first priority and the request type;
a command generator configured to generate an internal command for memory operation based on the command; and
a memory controller configured to schedule the internal command in a command queue based on the second priority.