US 12,235,793 B2
Programmable spatial array for matrix decomposition
Long Jiang, Beijing (CN); Xu Zhang, Beijing (CN); and Hong Cheng, Beijing (CN)
Assigned to Intel Corporation, Santa Clara, CA (US)
Appl. No. 18/017,077
Filed by Intel Corporation, Santa Clara, CA (US)
PCT Filed Sep. 25, 2020, PCT No. PCT/CN2020/117932
§ 371(c)(1), (2) Date Jan. 19, 2023,
PCT Pub. No. WO2022/061781, PCT Pub. Date Mar. 31, 2022.
Prior Publication US 2023/0297538 A1, Sep. 21, 2023
Int. Cl. G06F 15/80 (2006.01); G06F 17/16 (2006.01)
CPC G06F 15/8092 (2013.01) [G06F 17/16 (2013.01)] 22 Claims
OG exemplary drawing
 
10. An article of manufacture comprising one or more tangible, non-transitory, machine readable media comprising instructions that, when executed by processing circuitry, cause the processing circuitry to:
instruct a triangular spatial array of processing elements to perform a first type of matrix decomposition; and
instruct the same triangular spatial array of processing elements to perform a second type of matrix decomposition,
wherein the first type of matrix decomposition comprises one of a Cholesky decomposition, a QR decomposition, or a lower-upper (LU) decomposition, and wherein the second type of matrix decomposition comprises a type of matrix decomposition that is different than the first type of decomposition.