US 12,235,783 B2
Bus training with interconnected dice
Francesco Douglas Verna-Ketel, Boise, ID (US); Hyun Yoo Lee, Boise, ID (US); Smruti Subhash Jhaveri, Boise, ID (US); John Christopher Sancon, Boise, ID (US); Yang Lu, Boise, ID (US); and Kang-Yong Kim, Boise, ID (US)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by Micron Technology, Inc., Boise, ID (US)
Filed on Aug. 30, 2022, as Appl. No. 17/823,415.
Prior Publication US 2024/0070101 A1, Feb. 29, 2024
Int. Cl. G06F 13/40 (2006.01); G06F 13/16 (2006.01)
CPC G06F 13/4027 (2013.01) [G06F 13/1668 (2013.01)] 50 Claims
OG exemplary drawing
 
1. A method comprising:
receiving, by a first die of a memory package, multiple bits via a bus;
detecting, by the first die, the multiple bits as multiple first bits based on the receiving by the first die;
receiving, by a second die of the memory package, the multiple bits via the bus;
detecting, by the second die, the multiple bits as multiple second bits based on the receiving by the second die;
combining, at the memory package, the multiple first bits and the multiple second bits to produce a set of bits; and
transmitting, from the memory package to a memory controller, the set of bits over a data bus.