| CPC G06F 12/0862 (2013.01) [G06F 2212/6024 (2013.01)] | 20 Claims |
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1. An apparatus comprising:
prefetch pattern storage circuitry comprising a plurality of pattern storage entries, wherein each pattern storage entry:
is associated with respective storage location information; and
comprises a plurality of confidence values, each confidence value being representative of a confidence associated with an expected data access to a storage location having a respective offset relative to the respective storage location information, said expected data access being subsequent to a storage access corresponding to the respective storage location information,
pattern training circuitry to detect patterns of data access and to provide information representative of said detected patterns to the prefetch pattern circuitry for updating one or more corresponding pattern storage entries, wherein:
the pattern training circuitry comprises a plurality of training entries, each training entry being associated with information indicative of a given accessed storage location; and
each said training entry comprises a plurality of regions, each region comprising a plurality of elements, each said element being associated with a given storage location having a respective offset relative to the given accessed storage location and being configured to store information tracking accesses to said given storage location, said respective offsets comprising offsets from a given lowest offset to a given highest offset, wherein:
for a given training entry, at least one region is configured to store information for which said offset is positive, and at least one region is configured to store information for which said offset is negative; and
the pattern training circuitry is configured to transmit data indicative of said information to the prefetch pattern storage circuitry; and
the prefetch pattern storage circuitry is responsive to receiving said transmitted data to update at least one corresponding pattern storage element.
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