US 12,235,765 B2
Cache locality when using repurposed cache memory
Ariel Szapiro, Tel Aviv (IL); Anurag Chaudhary, San Jose, CA (US); Mark Rosenbluth, Uxbridge, MA (US); and Mayank Baunthiyal, Portland, OR (US)
Assigned to NVIDIA CORPORATION, Santa Clara, CA (US)
Filed by NVIDIA CORPORATION, Santa Clara, CA (US)
Filed on May 23, 2023, as Appl. No. 18/322,486.
Prior Publication US 2024/0394186 A1, Nov. 28, 2024
Int. Cl. G06F 12/0813 (2016.01); G06F 12/0811 (2016.01); G06F 12/0891 (2016.01)
CPC G06F 12/0813 (2013.01) [G06F 12/0811 (2013.01); G06F 12/0891 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A computer-implemented method for storing data in a repurposed cache memory in a computing system, the method comprising:
determining that a memory operation from a first processing unit results in a miss in a system level cache memory;
retrieving data associated with the memory operation from a system memory;
generating a candidate vector that specifies a direction from the system level cache memory to the first processing unit;
selecting a repurposed level two cache memory based on the candidate vector; and
storing the data in a cache line of the repurposed level two cache memory.