	US 12,235,708 B2
	Device and method for two-stage transitioning between reduced power states
Benjamin Tsien, Santa Clara, CA (US); Alexander J. Branover, Boxborough, MA (US); Indrani Paul, Austin, TX (US); Christopher T. Weaver, Boxborough, MA (US); Thomas J. Gibney, Boxborough, MA (US); Stephen V. Kosonocky, Fort Collins, CO (US); John P. Petry, San Diego, CA (US); and Mihir Shaileshbhai Doctor, Santa Clara, CA (US)
Assigned to Advanced Micro Devices, Inc., Santa Clara, CA (US)
Filed by Advanced Micro Devices, Inc., Santa Clara, CA (US)
Filed on Sep. 23, 2021, as Appl. No. 17/483,702.
Prior Publication US 2023/0090567 A1, Mar. 23, 2023
Int. Cl. G06F 1/32 (2019.01); G06F 1/3234 (2019.01)

CPC G06F 1/3234 (2013.01)

20 Claims

1. A processing device comprising:

a quality of service (QOS) component that has at least one QOS constraint;

a plurality of non-QOS components that do not have the at least one QOS constraint; and

a power management controller, in communication with the QOS component and the non-QOS components, and configured to:

issue fences for one or more non-QOS components among the plurality of the non-QOS components when it is determined that the one or more of the non-QOS components are idle;

issue a fence for the QOS component when the fences for the one or more non-QOS components are completed; and

enter a reduced power state when the fence for the QOS component is completed.