CPC G06F 1/3206 (2013.01) [G06F 13/4286 (2013.01); G06F 15/7807 (2013.01)] | 20 Claims |
1. A system, comprising:
a System-on-a-Chip (SoC) device configured to receive a requested target voltage, generate an analog voltage signal that steps up or down over time until the analog voltage signal corresponds to the requested target voltage, and output the analog voltage signal;
a Power Management Integrated Circuit (PMIC) having a voltage regulator, the PMIC being configured to receive the analog voltage signal from the SoC and send the analog voltage signal to the voltage regulator, wherein the voltage regulator is configured to reference the analog voltage signal from the SoC device and supply a corresponding output voltage to the SoC device;
a combined register and counter unit, wherein the register registers a requested target voltage ID value and the counter increments or decrements a voltage ID value from a current voltage ID value until the current voltage ID value equals the requested target voltage ID value; and
a Digital-to-Analog Converter (DAC) unit configured to read a digital voltage ID value, convert the digital voltage ID value into an analog voltage signal, and increase or decrease the converted analog voltage signal, wherein the DAC unit constantly reads the current voltage ID value presented in the counter and increases or decreases the converted analog voltage signal in configurable steps.
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