CPC G06F 1/12 (2013.01) [G06F 1/08 (2013.01); G09G 3/32 (2013.01); G09G 3/3225 (2013.01); G09G 2310/08 (2013.01)] | 20 Claims |
1. A signal generator, comprising:
a clock oscillator which generates clock signals;
a reference horizontal synchronization signal generation block which generates reference horizontal synchronization signals based on a number of the clock signals per a horizontal time which is a number of the clock signals generated or transmitted during one horizontal time;
a frame clock calculation block which calculates a first frame clock number by multiplying the number of the clock signals per the horizontal time by a number of horizontal times per a frame time;
a frame clock comparation block which calculates a clock offset by comparing the first frame clock number and a second frame clock number generated based on a number of the clock signals per the frame time;
a clock distribution block which generates horizontal synchronization signals by distributing a number of the clock signals corresponding to the clock offset to the reference horizontal synchronization signals;
a vertical synchronization signal generation block which generates a vertical synchronization signal based on the horizontal synchronization signals;
a deviation detection block which generates a clock gain by comparing the clock signals and reference clock signals provided from outside; and
a clock compensation block which calculates the second frame clock number by multiplying the clock gain by the number of the clock signals per the frame time.
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