US 12,235,469 B2
Multifunctional collimator for contact image sensors
Hsin-Yu Chen, Hsinchu (TW); Yen-Chiang Liu, Hsinchu (TW); Jiun-Jie Chiou, Hsi (TW); Jia-Syuan Li, Hsinchu (TW); You-Cheng Jhang, Hsinchu (TW); Shin-Hua Chen, Hsinchu (TW); Lavanya Sanagavarapu, Hsinchu (TW); Han-Zong Pan, Hsinchu (TW); Chun-Peng Li, Hsinchu (TW); Chia-Chun Hung, Hsinchu (TW); Ching-Hsiang Hu, Taipei (TW); Wei-Ding Wu, Zhubei (TW); Jui-Chun Weng, Taipei (TW); Ji-Hong Chiang, Changhua (TW); and Hsi-Cheng Hsu, Taichung (TW)
Assigned to Taiwan Semiconductor Manufacturing Co., Ltd., Hsin-Chu (TW)
Filed by Taiwan Semiconductor Manufacturing Co., Ltd., Hsin-Chu (TW)
Filed on Aug. 8, 2023, as Appl. No. 18/231,760.
Application 18/231,760 is a continuation of application No. 17/883,592, filed on Aug. 8, 2022, granted, now 11,782,284.
Application 17/883,592 is a continuation of application No. 16/656,290, filed on Oct. 17, 2019, granted, now 11,454,820.
Prior Publication US 2023/0400699 A1, Dec. 14, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. H01L 27/14 (2006.01); G02B 5/20 (2006.01); G02B 26/00 (2006.01); G02B 27/30 (2006.01); G06V 40/13 (2022.01); H01L 27/146 (2006.01); H01L 31/0216 (2014.01)
CPC G02B 27/30 (2013.01) [G02B 5/20 (2013.01); G02B 26/007 (2013.01); G06V 40/1312 (2022.01); H01L 27/1462 (2013.01); H01L 27/14625 (2013.01); H01L 31/02162 (2013.01); B32B 2551/00 (2013.01); G06V 40/1318 (2022.01)] 20 Claims
OG exemplary drawing
 
1. An optical collimator, comprising:
a dielectric layer;
a substrate;
at least one via hole; and
a conductive layer,
wherein the dielectric layer is formed over the substrate, wherein the at least one via hole extends through the dielectric layer and the substrate in a vertical direction,
wherein the conductive layer is formed over both a surface of the dielectric layer and the portion of sidewalls of the at least one via hole, and wherein a first thickness of the conductive layer over the surface of the dielectric layer is greater than a second thickness of the conductive layer over the sidewalls of the at least one via hole, and
wherein the first thickness of the conductive layer over the surface of the dielectric layer is approximately 20 nanometers and the second thickness of the conductive layer over the sidewalls of the at least one via hole is approximately 2 nanometers.