US 11,910,593 B2
Ground-connected supports with insulating spacers for semiconductor memory capacitors and method of fabricating the same
Yoon Young Choi, Seoul (KR); Seung Jin Kim, Hwaseong-si (KR); Byung-Hyun Lee, Hwaseong-si (KR); and Sang Jae Park, Seoul (KR)
Assigned to Samsung Electronics Co., Ltd., Gyeonggi-do (KR)
Filed by Samsung Electronics Co., Ltd., Suwon-si (KR)
Filed on Sep. 25, 2020, as Appl. No. 17/032,655.
Claims priority of application No. 10-2019-0151871 (KR), filed on Nov. 25, 2019.
Prior Publication US 2021/0159230 A1, May 27, 2021
Int. Cl. H01L 25/065 (2023.01); H01L 25/00 (2006.01); H01L 21/768 (2006.01); H01L 23/00 (2006.01); H01L 23/532 (2006.01); H01L 23/31 (2006.01); H01L 23/528 (2006.01); H01L 23/522 (2006.01); H01L 27/088 (2006.01); H10B 12/00 (2023.01); G11C 5/10 (2006.01); G11C 11/402 (2006.01); H01L 49/02 (2006.01)
CPC H10B 12/34 (2023.02) [G11C 5/10 (2013.01); G11C 11/4023 (2013.01); H01L 28/91 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
a plurality of lower electrodes extending vertically from an upper surface of a substrate;
a first electrode support between adjacent lower electrodes of the plurality of lower electrodes, the first electrode support comprising a conductive material;
a dielectric layer on the plurality of lower electrodes and the first electrode support and extending along profiles of the first electrode support and each of the plurality of lower electrodes; and
an upper electrode on the dielectric layer and encircling at least one of the plurality of lower electrodes,
wherein the first electrode support is vertically over a portion of the upper electrode.