US 11,910,592 B2
Capacitor and a DRAM device including the same
Kyooho Jung, Seoul (KR); Dongkwan Baek, Seoul (KR); and Cheoljin Cho, Hwaseong-si (KR)
Assigned to Samsung Electronics Co., Ltd., Suwon-si (KR)
Filed by Samsung Electronics Co., Ltd., Suwon-si (KR)
Filed on Mar. 23, 2022, as Appl. No. 17/702,190.
Claims priority of application No. 10-2021-0087102 (KR), filed on Jul. 2, 2021.
Prior Publication US 2023/0005925 A1, Jan. 5, 2023
Int. Cl. H10B 12/00 (2023.01)
CPC H10B 12/315 (2023.02) [H10B 12/033 (2023.02); H10B 12/34 (2023.02)] 16 Claims
OG exemplary drawing
 
1. A capacitor, comprising:
a lower electrode;
a dielectric layer structure on the lower electrode, the dielectric layer structure comprising a plurality of dielectric layers and at least one insert layer structure between ones of the plurality of dielectric layers; and
an upper electrode on the dielectric layer structure,
wherein the at least one insert layer structure includes a plurality of zirconium oxide layers and at least two insert layers, and each of the at least two the insert layers is between ones of the plurality of zirconium oxide layers, wherein the insert layer structure comprising at least two insert layers is higher than a central portion in a vertical direction of the dielectric layer structure.