US 11,908,870 B2
Thin film transistor array substrate having metal layer bridging structure and display panel including the same
Xing Ming, Wuhan (CN); and Zhongtao Cao, Wuhan (CN)
Assigned to Wuhan China Star Optoelectronics Semiconductor Display Technology Co., Ltd., Wuhan (CN)
Appl. No. 16/957,392
Filed by Wuhan China Star Optoelectronics Semiconductor Display Technology Co., Ltd., Wuhan (CN)
PCT Filed Oct. 22, 2019, PCT No. PCT/CN2019/112486
§ 371(c)(1), (2) Date Jun. 24, 2020,
PCT Pub. No. WO2021/007980, PCT Pub. Date Jan. 21, 2021.
Claims priority of application No. 201910651774.3 (CN), filed on Jul. 18, 2019.
Prior Publication US 2023/0102637 A1, Mar. 30, 2023
Int. Cl. H01L 27/12 (2006.01); H10K 77/10 (2023.01); H10K 59/123 (2023.01); H10K 102/00 (2023.01); H10K 59/12 (2023.01)
CPC H01L 27/1218 (2013.01) [H10K 59/123 (2023.02); H10K 77/111 (2023.02); H10K 59/1201 (2023.02); H10K 2102/311 (2023.02)] 12 Claims
OG exemplary drawing
 
1. A thin film transistor (TFT) array substrate, comprising a substrate layer and a metal layer disposed on the substrate layer, wherein the metal layer comprises a metal layer bridging structure, the metal layer bridging structure comprises a first metal layer and a bridging metal layer, and an insulating layer is disposed between the first metal layer and the bridging metal layer;
wherein the first metal layer comprises two segments of a first segment of the first metal layer and a second segment of the first metal layer, the first segment of the first metal layer and the second segment of the first metal layer are disposed at intervals, and the bridging metal layer connects the first segment of the first metal layer and the second segment of the first metal layer;
wherein the TFT array substrate comprises a display region and a bending region, and the metal layer bridging structure is disposed in the bending region; and wherein in the bending region, the TFT array substrate further comprises:
a gate layer disposed on the substrate layer;
an interlayer dielectric layer disposed on a side of the gate layer away from the substrate layer;
an organic filling layer disposed on the interlayer dielectric layer, wherein the organic filling layer is provided with a plurality of first through-holes and a plurality of second through-holes; wherein the first segment of the first metal layer is disposed in each of the first through-holes, and the second segment of the first metal layer is disposed on the organic filling layer and located outside of the first through-holes; the insulating layer is disposed on the first metal layer, and the bridging metal layer is disposed on a side of the insulating layer away from the first metal layer; and
wherein the bridging metal layer is disposed between adjacent ones of the second through-holes.