CPC H01L 25/0657 (2013.01) [H01L 24/08 (2013.01); H01L 25/18 (2013.01); H01L 2224/08145 (2013.01); H01L 2225/06544 (2013.01); H01L 2225/06565 (2013.01); H01L 2225/06589 (2013.01)] | 9 Claims |
1. A 3D device, the device comprising:
at least a first level comprising logic circuits;
at least a second level bonded to said first level,
wherein said second level comprises a plurality of transistors,
wherein said device comprises connectivity structures,
wherein said connectivity structures comprise at least one of the following:
a. differential signaling, or
b. radio frequency transmission lines, or
c. Surface Waves Interconnect (SWI) lines, and
wherein said bonded comprises oxide to oxide bond regions and metal to metal bond regions; and
a plurality of vias disposed through said second level,
wherein said plurality of vias have a circumscribed diameter of less than 2 micrometers.
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