US 11,908,781 B2
Semiconductor device package and a method of manufacturing the same
Wei-Chih Cho, Kaohsiung (TW); Chun-Hung Yeh, Kaohsiung (TW); and Tsung-Wei Lu, Kaohsiung (TW)
Assigned to ADVANCED SEMICONDUCTOR ENGINEERING, INC., Kaohsiung (TW)
Filed by Advanced Semiconductor Engineering, Inc., Kaohsiung (TW)
Filed on Mar. 22, 2021, as Appl. No. 17/209,085.
Prior Publication US 2022/0301995 A1, Sep. 22, 2022
Int. Cl. H01L 23/498 (2006.01); H01L 23/31 (2006.01); H01L 21/56 (2006.01); H01L 21/48 (2006.01)
CPC H01L 23/49805 (2013.01) [H01L 21/4853 (2013.01); H01L 21/565 (2013.01); H01L 23/3128 (2013.01); H01L 23/49838 (2013.01)] 18 Claims
OG exemplary drawing
 
1. A semiconductor package structure, comprising:
a substrate including a first surface;
a first encapsulant covering the first surface of the substrate and including an upper surface and a lateral side surface;
a patterned conductive layer extending on the upper surface and the lateral side surface of the first encapsulant; and
a first electronic component disposed on the patterned conductive layer; and
a second electronic component encapsulated by the first encapsulant and electrically connected to the first electronic component through the substrate and the patterned conductive layer,
wherein the substrate includes a second surface opposite to the first surface,
wherein the semiconductor package structure further comprises a third electronic component connected to the substrate through the second surface of the substrate, and
wherein the third electronic component is electrically connected to the first electronic component through the patterned conductive layer.