US 11,908,749 B2
Method of metal gate formation and structures formed by the same
Yi-Jing Lee, Hsinchu (TW); Ya-Yun Cheng, Taichung (TW); Hau-Yu Lin, Kaohsiung (TW); I-Sheng Chen, Taipei (TW); Chia-Ming Hsu, Hualien County (TW); Chih-Hsin Ko, Kaohsiung County (TW); and Clement Hsingjen Wann, Carmel, NY (US)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD., Hsinchu (TW)
Filed by TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD., Hsinchu (TW)
Filed on Nov. 21, 2022, as Appl. No. 18/057,741.
Application 18/057,741 is a continuation of application No. 17/067,193, filed on Oct. 9, 2020, granted, now 11,508,627.
Application 17/067,193 is a continuation of application No. 16/372,178, filed on Apr. 1, 2019, granted, now 10,804,163, issued on Oct. 13, 2020.
Claims priority of provisional application 62/753,319, filed on Oct. 31, 2018.
Prior Publication US 2023/0079483 A1, Mar. 16, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. H01L 23/00 (2006.01); H01L 21/8238 (2006.01); H01L 27/092 (2006.01); H01L 29/49 (2006.01); H01L 21/321 (2006.01); H01L 21/02 (2006.01); H01L 21/28 (2006.01); H01L 29/66 (2006.01)
CPC H01L 21/823842 (2013.01) [H01L 21/02068 (2013.01); H01L 21/28088 (2013.01); H01L 21/321 (2013.01); H01L 27/0922 (2013.01); H01L 29/4966 (2013.01); H01L 29/66545 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method of forming a semiconductor structure, comprising:
providing a substrate;
providing a first gate electrode over the substrate;
forming a first pair of spacers on two sides of the first gate electrode;
removing the first gate electrode to form a first trench between the first pair of spacers;
depositing a dielectric layer in the first trench;
depositing a first layer over the dielectric layer;
removing the first layer from the first trench; and
depositing a work function layer over the dielectric layer in the first trench.