US 11,908,079 B2
Variable rate tessellation
Renju Boben, Alapuzha (IN); Kalyan Kumar Bhiravabhatla, Bengaluru (IN); Vishwanath Shashikant Nikam, Bangalore (IN); Suvam Chatterjee, Bangalore (IN); Ankit Kumar Singh, Bangalore (IN); Abhishek Lal, Bengaluru (IN); and Sampathkumar Periasamy, Bangalore (IN)
Assigned to QUALCOMM Incorporated, San Diego, CA (US)
Filed by QUALCOMM Incorporated, San Diego, CA (US)
Filed on Apr. 8, 2022, as Appl. No. 17/658,634.
Prior Publication US 2023/0326134 A1, Oct. 12, 2023
Int. Cl. G06T 17/20 (2006.01); G06T 15/00 (2011.01)
CPC G06T 17/20 (2013.01) [G06T 15/005 (2013.01)] 30 Claims
OG exemplary drawing
 
1. An apparatus for graphics processing, comprising:
a memory; and
at least one processor coupled to the memory and configured to:
receive data for geometry processing of a plurality of patches in a draw call, each of the plurality of patches including a plurality of primitives, each of the plurality of primitives in each of the plurality of patches including one or more sub-primitives;
reduce a tessellation factor of each of the plurality of patches based on a property of each of the plurality of patches, the reduced tessellation factor corresponding to a tessellation reduction factor (TRF), the property corresponding to a shading rate or a number of visible pixels;
apply the TRF for each of the plurality of patches; and
render each of the plurality of patches based on the applied TRF for each of the plurality of patches.