CPC G06F 9/30043 (2013.01) [G06F 9/3009 (2013.01); G06F 9/522 (2013.01); G06F 12/0808 (2013.01); G06F 12/0888 (2013.01); G06F 9/3004 (2013.01)] | 21 Claims |
1. A processing system comprising:
a multithreaded processor configured to concurrently execute a plurality of threads;
a plurality of data registers, each of the data registers assigned to executing threads; and
on-chip memory including a cache memory and a shared memory,
wherein the system is configured to, in response to at least one of the threads, execute a first instruction to retrieve data stored in a memory external to the processing system through the data registers and the cache memory and store the data into the shared memory, and in response to at least one of the threads, execute a second instruction to retrieve data stored in the memory external to the processing system and store the data into the shared memory without first storing the data in the data registers.
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