US 11,907,062 B2
Error check scrub operation method and semiconductor system using the same
Hee Eun Choi, Icheon-si (KR); Kwang Soon Kim, Icheon-si (KR); and Ji Eun Kim, Icheon-si (KR)
Assigned to SK hynix Inc., Icheon-si (KR)
Filed by SK hynix Inc., Icheon-si (KR)
Filed on Mar. 29, 2022, as Appl. No. 17/707,656.
Claims priority of application No. 10-2021-0160809 (KR), filed on Nov. 19, 2021.
Prior Publication US 2023/0161665 A1, May 25, 2023
Int. Cl. G06F 11/00 (2006.01); G06F 11/10 (2006.01)
CPC G06F 11/106 (2013.01) 21 Claims
OG exemplary drawing
 
1. A semiconductor system comprising:
a controller configured to count a number of error check scrub (ECS) operations and configured to generate ECS information comprising information with regard to an address at which the ECS operation is to be performed based on the number of ECS operations; and
a memory apparatus configured to perform the ECS operation on a region that is selected by the ECS information, and
wherein the controller is configured to store the number of ECS operations before a power-off operation, and output the ECS information that is stored in the controller to the memory apparatus after a start of a boot-up operation.