CPC G06F 11/106 (2013.01) | 21 Claims |
1. A semiconductor system comprising:
a controller configured to count a number of error check scrub (ECS) operations and configured to generate ECS information comprising information with regard to an address at which the ECS operation is to be performed based on the number of ECS operations; and
a memory apparatus configured to perform the ECS operation on a region that is selected by the ECS information, and
wherein the controller is configured to store the number of ECS operations before a power-off operation, and output the ECS information that is stored in the controller to the memory apparatus after a start of a boot-up operation.
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