US 11,907,033 B2
Adaptive power-on-reset generator systems and methods for programmable logic devices
Chwei-Po Chew, San Jose, CA (US); and Bradley A. Sharpe-Geisler, San Jose, CA (US)
Assigned to Lattice Semiconductor Corporation, Hillsboro, OR (US)
Filed by Lattice Semiconductor Corporation, Hillsboro, OR (US)
Filed on Jun. 3, 2022, as Appl. No. 17/832,496.
Application 17/832,496 is a continuation of application No. PCT/US2020/063508, filed on Dec. 5, 2020.
Claims priority of provisional application 62/944,457, filed on Dec. 6, 2019.
Prior Publication US 2022/0291731 A1, Sep. 15, 2022
Int. Cl. G06F 1/24 (2006.01); G06F 1/28 (2006.01); H03K 17/22 (2006.01)
CPC G06F 1/24 (2013.01) [G06F 1/28 (2013.01); H03K 17/223 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An adaptive power on reset (POR) signal generator, comprising:
a ramp voltage selector configured to monitor a supply voltage provided by a power supply and generate a ramp voltage based, at least in part, on the monitored supply voltage; and
a logic device configured to:
detect a first supply voltage ramp traversal across a first threshold ramp voltage based, at least in part, on the ramp voltage provided by the ramp voltage selector;
detect a second supply voltage ramp traversal across a second threshold ramp voltage, wherein the second threshold ramp voltage is higher than the first threshold ramp voltage and the first and second threshold ramp voltages are lower than a nominal operating voltage associated with the power supply and/or the supply voltage;
determine a time at which to generate a POR signal based, at least in part, on an amount of time between the first supply voltage ramp traversal and the second supply voltage ramp traversal; and
generate the POR signal based on the determined time.