CPC G01R 31/40 (2013.01) [G01R 29/0871 (2013.01); H03F 3/211 (2013.01); H03F 3/245 (2013.01); H03F 2200/267 (2013.01); H03F 2200/451 (2013.01)] | 20 Claims |
1. A testing system, comprising:
a dividing circuit configured to receive a testing signal and provide a plurality of input signals according to the testing signal; and
a plurality of power-amplifier chips coupled to the dividing circuit, each of the plurality of power-amplifier chips being configured to be tested by receiving a respective input signal of the plurality of input signals and generating a respective output signal for a predetermined testing time.
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