US 11,906,598 B2
Power amplifiers testing system and related testing method
Hsieh-Hung Hsieh, Taipei (TW); Wu-Chen Lin, Hsinchu (TW); Yen-Jen Chen, Taipei (TW); and Tzu-Jin Yeh, Hsinchu (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD., Hsinchu (TW)
Filed by TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD., Hsinchu (TW)
Filed on Aug. 8, 2022, as Appl. No. 17/818,141.
Application 17/818,141 is a continuation of application No. 16/668,986, filed on Oct. 30, 2019, granted, now 11,493,563.
Prior Publication US 2022/0381808 A1, Dec. 1, 2022
This patent is subject to a terminal disclaimer.
Int. Cl. G01R 31/40 (2020.01); H03F 3/21 (2006.01); G01R 29/08 (2006.01); H03F 3/24 (2006.01)
CPC G01R 31/40 (2013.01) [G01R 29/0871 (2013.01); H03F 3/211 (2013.01); H03F 3/245 (2013.01); H03F 2200/267 (2013.01); H03F 2200/451 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A testing system, comprising:
a dividing circuit configured to receive a testing signal and provide a plurality of input signals according to the testing signal; and
a plurality of power-amplifier chips coupled to the dividing circuit, each of the plurality of power-amplifier chips being configured to be tested by receiving a respective input signal of the plurality of input signals and generating a respective output signal for a predetermined testing time.