US 11,906,573 B2
Testing module and testing method using the same
Hao Chen, New Taipei (TW); and Mill-Jer Wang, Hsinchu (TW)
Assigned to Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed on Jan. 30, 2023, as Appl. No. 18/161,839.
Application 18/161,839 is a continuation of application No. 16/805,874, filed on Mar. 2, 2020, granted, now 11,585,846.
Claims priority of provisional application 62/893,792, filed on Aug. 29, 2019.
Prior Publication US 2023/0168296 A1, Jun. 1, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. G01R 31/27 (2006.01); G01R 1/04 (2006.01)
CPC G01R 31/275 (2013.01) [G01R 1/0466 (2013.01); G01R 1/0491 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A testing module for a semiconductor wafer-form package, comprising:
a circuit board structure;
first connectors, disposed over the circuit board structure and connected to the circuit board structure;
a first connecting structure, disposed over and distant from the circuit board structure;
second connectors and third connectors, disposed over and connected to the first connecting structure, wherein the third connectors are configured to transmit electric signals for testing the semiconductor wafer-form package being placed over the circuit board structure; and
a first bridge connector, electrically coupling the circuit board structure and the first connecting structure by connecting the second connectors and the first connectors,
wherein the semiconductor wafer-form package is surrounded by the circuit board structure, the first connectors, the first bridge connector, the first connecting structure, the second connectors, and the third connectors.