US 12,232,433 B2
Semiconductor device and method of forming a semiconductor device
Artur Wroblewski, Munich (DE); Joel Hatsch, Holzkirchen (DE); Christoph Saas, Munich (DE); and Stefan Seidl, Munich (DE)
Assigned to Infineon Technologies AG, Neubiberg (DE)
Filed by Infineon Technologies AG, Neubiberg (DE)
Filed on Mar. 8, 2022, as Appl. No. 17/689,604.
Claims priority of application No. 102021105680.2 (DE), filed on Mar. 9, 2021.
Prior Publication US 2022/0293852 A1, Sep. 15, 2022
Int. Cl. H10N 70/00 (2023.01); H01L 49/02 (2006.01); H10B 63/00 (2023.01)
CPC H10N 70/826 (2023.02) [H01L 28/24 (2013.01); H10B 63/00 (2023.02); H10N 70/021 (2023.02); H10N 70/8833 (2023.02)] 19 Claims
OG exemplary drawing
 
1. A semiconductor device, comprising:
a carrier having two main surfaces situated opposite one another;
a circuit, comprising at least one resistance element, in and/or on the carrier, wherein the at least one resistance element has a longitudinal axis extending vertically between the main surfaces of the carrier; and
a current limiting circuit configured to limit a current flowing through the resistance element to a value at which it is ensured that an electrical resistance of the resistance element remains substantially unchanged.