CPC H01L 29/0657 (2013.01) [H01L 21/78 (2013.01); H01L 29/7813 (2013.01)] | 16 Claims |
1. A chip singulation method including dicing a wafer having an upper surface on which a plurality of semiconductor element structures are formed, the chip singulation method comprising, in a stated order:
a first process of forming a surface supporting layer on the upper surface of the wafer;
a second process of thinning the wafer from an undersurface thereof;
a third process of removing the surface supporting layer from the upper surface of the wafer;
a fourth process of forming a metal layer having a thickness of at least 10 μm on the undersurface of the wafer that has been thinned;
a fifth process of applying a dicing tape onto an undersurface of the metal layer;
a sixth process of applying, onto the upper surface of the wafer, a process of increasing hydrophilicity of a surface of the wafer;
a seventh process of forming a water-soluble protective layer on the surface of the wafer;
an eighth process of cutting the wafer and the metal layer to penetrate the wafer and the metal layer straight from the upper surface of the wafer to the undersurface of the metal layer in a single process by irradiating a predetermined region of the upper surface of the wafer with a laser beam; and
a ninth process of removing the water-soluble protective layer from the surface of the wafer using wash water,
wherein the chip singulation method further comprises, in a period from when the sixth process ends until when the seventh process starts, a storing process of storing the wafer in a storage environment in which the hydrophilicity of the surface of the wafer is maintained.
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