US 12,232,321 B2
Semiconductor memory device
Go Oike, Mie Mie (JP); and Tsuyoshi Sugisaki, Yokkaichi Mie (JP)
Assigned to KIOXIA CORPORATION, Tokyo (JP)
Filed by KIOXIA CORPORATION, Tokyo (JP)
Filed on Sep. 27, 2023, as Appl. No. 18/475,335.
Application 18/475,335 is a continuation of application No. 17/665,979, filed on Feb. 7, 2022, granted, now 11,818,890.
Application 17/665,979 is a continuation of application No. 17/087,724, filed on Nov. 3, 2020, granted, now 11,282,858, issued on Mar. 22, 2022.
Application 17/087,724 is a continuation of application No. 16/751,293, filed on Jan. 24, 2020, granted, now 10,861,875, issued on Dec. 8, 2020.
Application 16/751,293 is a continuation of application No. 16/118,598, filed on Aug. 31, 2018, granted, now 10,763,277, issued on Sep. 1, 2020.
Claims priority of application No. 2018-046940 (JP), filed on Mar. 14, 2018.
Prior Publication US 2024/0032297 A1, Jan. 25, 2024
This patent is subject to a terminal disclaimer.
Int. Cl. H10B 41/00 (2023.01); G11C 5/06 (2006.01); G11C 16/04 (2006.01); G11C 16/08 (2006.01); H10B 41/10 (2023.01); H10B 41/27 (2023.01); H10B 41/35 (2023.01); H10B 43/10 (2023.01); H10B 43/27 (2023.01); H10B 43/35 (2023.01); H01L 29/792 (2006.01)
CPC H10B 43/27 (2023.02) [G11C 5/063 (2013.01); G11C 16/0483 (2013.01); G11C 16/08 (2013.01); H10B 41/10 (2023.02); H10B 41/27 (2023.02); H10B 41/35 (2023.02); H10B 43/10 (2023.02); H10B 43/35 (2023.02); H01L 29/792 (2013.01)] 15 Claims
OG exemplary drawing
 
1. A semiconductor memory device comprising:
a stacked body including a plurality of first conductive layers stacked apart from each other in a first direction, a part of the plurality of first conductive layers being formed in a stepwise form;
a first insulating layer provided on the part in the stepwise form of the plurality of first conductive layers;
a first memory pillar extending in the first direction and provided in the stacked body;
a plurality of first plugs extending in the first direction, provided in the first insulating layer, and being in contact with the plurality of first conductive layers, respectively; and
a plurality of second plugs extending though the plurality of first conductive layers in the first direction, provided in the stacked body, and electrically coupled to the plurality of first plugs, respectively.