| CPC H10B 20/25 (2023.02) [H10B 20/20 (2023.02)] | 16 Claims |
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1. A method of manufacturing a semiconductor device including an active area in a strip, comprising:
providing a semiconductor substrate including the active area disposed in the semiconductor substrate, a first dielectric layer over the semiconductor substrate, a second dielectric layer over the first dielectric layer, and a patterned photoresist layer over the second dielectric layer;
removing first portions of the semiconductor substrate, the first dielectric layer and the second dielectric layer exposed through the patterned photoresist layer to form a trench surrounded by second portions of the first dielectric layer and the second dielectric layer;
removing the patterned photoresist layer;
disposing an isolation material over the semiconductor substrate and the second portion of the second dielectric layer;
removing top portions of the isolation material to form an isolation member within the trench;
disposing a sacrificial pillar over the second portion of the second dielectric layer and a portion of the isolation member;
disposing a first circular spacer over the isolation member and the second portion of the second dielectric layer to contact with and surround an outer surface of the sacrificial pillar;
removing the sacrificial pillar;
disposing a second circular spacer over the isolation member and the second portion of the second dielectric layer to contact with an outer surface and an inner surface of the first circular spacer, and forming an opening surrounded by the first circular spacer and the second circular spacer to expose the second portions of the first dielectric layer and the second dielectric layer; and
removing the second portions of the first dielectric layer and the second dielectric layer exposed from the opening.
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