| CPC H04W 74/0833 (2013.01) [H04W 74/006 (2013.01); H04W 76/11 (2018.02)] | 35 Claims |

|
13. An apparatus comprising:
at least one processor; and
at least one memory storing instructions that, when executed by the at least one processor, cause the apparatus at least to:
determine an offset;
where the determining of the offset is based upon an unused value in a random access radio network temporary identifier space of a message, where the message is a Msg2 message of a 4-step contention based random access procedure;
determine a first radio network temporary identifier based, at least partially, upon the offset; and
use the first radio network temporary identifier for subsequently transmitting a message to a device.
|