CPC H04W 72/23 (2023.01) [H04L 5/0051 (2013.01); H04W 72/0446 (2013.01); H04W 72/0453 (2013.01); H04W 72/1273 (2013.01); H04W 72/535 (2023.01)] | 14 Claims |
1. An apparatus for a generation node B (gNB) configured for operating in a fifth-generation (5G) new radio (NR) network, the apparatus comprising: processing circuitry; and memory,
wherein for slot-less operation at frequencies above a 52.6 GHz carrier frequency, the processing circuitry is configured to:
generate signalling to configure a user equipment (UE) with a gap between demodulation reference signal (DMRS) symbols for an associated physical downlink shared channel (PDSCH);
encode the DMRS symbols for transmission in accordance with the gap; and
encode the associated PDSCH for transmission, wherein the PDSCH is transmitted during the gap between the DMRS symbol transmissions at symbol times following the DMRS symbols,
wherein the memory is configured to store an indication of the gap,
wherein the PDSCH comprises a plurality of code block groups (CBGs), and
wherein the processing circuitry is further configured to:
encode a physical downlink control channel (PDCCH) for transmission comprising a DCI format that scheduled the PDSCH, the DCI format comprising a starting symbol and length indicator value (SLIV) of a first CBG of the PDSCH,
wherein the gap in indicated by the SLIV,
wherein the DMRS symbols are encoded for transmission outside the SLIV for each CBG of the PDSCH, and
wherein a first of the DMRS symbols are encoded for transmission at a symbol time prior to a first CBG of the PDSCH.
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