CPC H04W 72/0446 (2013.01) [H04L 1/0081 (2013.01)] | 20 Claims |
1. An apparatus comprising:
at least one processor; and
at least one memory including computer program code, the at least one memory and the computer program code configured to, with the at least one processor, cause the apparatus to perform at least the following:
determining a plurality of candidate data transmission slots, wherein each candidate data transmission slot has an index and the plurality of candidate data transmission slots are arranged in an order;
setting an index of a current candidate data transmission slot of the plurality of candidate data transmission slots to be an incremental increase of an index of a preceding candidate data transmission slot of the plurality of candidate data transmission slots in the event that a timing gap between a start of the current candidate data transmission slot and a start of a subsequent candidate data transmission slot of the plurality of candidate data transmission slots is greater than a threshold; and
setting the index of the current candidate data transmission slot to be equal to the index of the preceding candidate data transmission slot of the plurality of candidate data transmission slots in the event that the timing gap is not greater than the threshold.
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