US 12,231,791 B2
Solid-state imaging device, method for driving the same, and electronic device
Hiroaki Yamajo, Kanagawa (JP); Masayuki Tachi, Kanagawa (JP); and Kazuhito Kobayashi, Kanagawa (JP)
Assigned to Sony Semiconductor Solutions Corporation, Kanagawa (JP)
Appl. No. 17/623,017
Filed by Sony Semiconductor Solutions Corporation, Kanagawa (JP)
PCT Filed Jun. 18, 2020, PCT No. PCT/JP2020/023986
§ 371(c)(1), (2) Date Dec. 27, 2021,
PCT Pub. No. WO2021/002213, PCT Pub. Date Jan. 7, 2021.
Claims priority of application No. 2019-123705 (JP), filed on Jul. 2, 2019.
Prior Publication US 2022/0272292 A1, Aug. 25, 2022
Int. Cl. H04N 25/704 (2023.01); H04N 25/13 (2023.01); H04N 25/75 (2023.01)
CPC H04N 25/704 (2023.01) [H04N 25/134 (2023.01); H04N 25/75 (2023.01)] 12 Claims
OG exemplary drawing
 
1. A solid-state imaging device, comprising:
a pixel array including a plurality of pixels arranged in rows and columns, the pixels corresponding to units of microlenses respectively associated with color filters of a same color, wherein
the plurality of pixels includes a first pixel, a second pixel and a third pixel arranged in a first pixel row, the first pixel corresponding to a first microlens associated with a first color, the second pixel corresponding to the first microlens associated with the first color, and the third pixel corresponding to a second microlens associated with a second color different from the first color;
a first signal line configured to transmit a drive signal for driving a first transfer transistor of the first pixel;
a second signal line configured to transmit a drive signal for driving a second transfer transistor of the second pixel;
a third signal line configured to transmit a drive signal for driving a third transfer transistor of the third pixel; and
a drive circuit configured to control the first, second and third transfer transistors,
wherein the drive circuit controls all of the first transfer transistor, the second transfer transistor and the third transfer transistor to be in an active state in a first drive mode, and, among the first through third transfer transistors, controls only the first transfer transistor and the second transfer transistor to be in an active state in a second drive mode.