US 12,231,667 B2
Intra-block copy decoding using dynamic re-mapping of on-chip memory
John Thodiyil, Saratoga, CA (US)
Assigned to QUALCOMM Incorporated, San Diego, CA (US)
Filed by QUALCOMM Incorporated, San Diego, CA (US)
Filed on Oct. 27, 2023, as Appl. No. 18/495,983.
Application 18/495,983 is a continuation of application No. 17/655,393, filed on Mar. 18, 2022, granted, now 11,849,129.
Prior Publication US 2024/0064319 A1, Feb. 22, 2024
Int. Cl. H04N 19/159 (2014.01); H04N 19/176 (2014.01); H04N 19/423 (2014.01); H04N 19/593 (2014.01)
CPC H04N 19/423 (2014.11) [H04N 19/159 (2014.11); H04N 19/176 (2014.11); H04N 19/593 (2014.11)] 30 Claims
OG exemplary drawing
 
1. A device comprising:
a decoder configured to:
identify, during an intra-block copy (IBC) decoding process on at least a portion of a coding unit of video data, a target virtual address in a virtual address space associated with a read operation of the IBC decoding process, the target virtual address generated according to an addressing scheme of an on-chip memory used by the IBC decoding process;
identify, based on the target virtual address, an on-chip memory start address of a portion of the on-chip memory, the on-chip memory configured to store reconstructed blocks of the video data; and
perform the read operation to read a block of pixel data from the on-chip memory using the on-chip memory start address.