CPC H04N 19/39 (2014.11) [H04N 19/88 (2014.11)] | 5 Claims |
1. An encoder comprising:
circuitry; and
memory coupled to the circuitry, wherein
in operation, the circuitry:
encodes a plurality of pictures which have common time information and each of which is included in a different layer;
adds the plurality of pictures into one access unit in a bitstream; and
adds, into the bitstream, a first flag indicating that a total number of access units present in the bitstream is one.
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