| CPC H04N 19/186 (2014.11) [H04N 19/117 (2014.11); H04N 19/176 (2014.11); H04N 19/182 (2014.11); H04N 19/593 (2014.11)] | 19 Claims |

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1. An image processing apparatus comprising:
circuitry configured to
prohibit use of a motion vector of a top right block located adjacent to top right of a current block as candidates of prediction motion vector of a merge mode;
generate a spatial prediction vector of the current block, using as candidates of prediction motion vector of the merge mode a motion vector other than the motion vector of the top right block which is prohibited from being used; and
encode a motion vector of the current block, using the prediction motion vector of the current block.
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