US 12,231,168 B2
Bit-wise inverse multiplexing for optical channels utilizing microLEDs
Robert Kalman, Sunnyvale, CA (US); Bardia Pezeshki, Sunnyvale, CA (US); and Alexander Tselikov, Sunnyvale, CA (US)
Assigned to AvicenaTech, Corp., Sunnyvale, CA (US)
Filed by AvicenaTech Corp., Sunnyvale, CA (US)
Filed on Feb. 22, 2024, as Appl. No. 18/584,186.
Application 18/584,186 is a continuation of application No. 17/805,445, filed on Jun. 3, 2022, granted, now 11,949,455.
Claims priority of provisional application 63/197,263, filed on Jun. 4, 2021.
Prior Publication US 2024/0313862 A1, Sep. 19, 2024
Int. Cl. H04B 10/50 (2013.01); H04B 10/25 (2013.01); H04B 10/508 (2013.01)
CPC H04B 10/502 (2013.01) [H04B 10/25 (2013.01); H04B 10/508 (2013.01)] 1 Claim
OG exemplary drawing
 
1. An optical communication apparatus for transmitting inverse-multiplexed data, comprising:
an inverse multiplexer having a serial input electrical signals and configured to produce parallel input electrical signals based on a counter configured to receive a clock signal;
an input latch to latch the parallel input electrical signals so as to provide latched parallel input electrical signals, the latch clocked by an output of a divide by N counter;
transmitter circuitry configured to receive the latched parallel input electrical signals and the output of the divide by N counter, and to drive microLEDs to produce a parallel optical signals representative of the parallel input electrical signals and the output of the divide by N counter;
a first optical coupling assembly to couple light from the microLEDs to a first end of a multicore fiber;
a second optical coupling assembly to couple light from a second end of the multicore fiber to photodetectors to produce parallel output electrical signals representative of the parallel input electrical signals and the output of the divide by N counter;
a multiplexer having a plurality of inputs configured to receive the parallel output electrical signals representative of the parallel input electrical signals and convert the plurality of parallel output electrical signals to serial output electrical signals; and
further comprising an error-correcting code (ECC) encoder, the ECC encoder configured to generate error correction electrical signals based on the parallel input electrical signals, and wherein the transmitter circuitry is further configured to receive the error correction electrical signals and drive additional microLEDs to produce error correction optical signals, and wherein the parallel optical signals include the error correction optical signals.