| CPC H03L 7/00 (2013.01) [H03K 5/135 (2013.01); H03K 19/20 (2013.01); H03K 23/542 (2013.01)] | 20 Claims |

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1. An integrated circuit, comprising:
a clock source configured to generate a clock signal of the integrated circuit;
at least two functional circuits; and
at least two clock generators corresponding to the at least two functional circuits, wherein each of the clock generators is electrically coupled to the clock source and electrically coupled to a corresponding functional circuit, and is configured to:
generate a clock signal of the corresponding functional circuit based on the clock signal of the integrated circuit and an initial phase of the corresponding functional circuit, so as to keep clock signals of all the functional circuits synchronized,
wherein the initial phase is determined based on a transmission distance, over which the clock signal of the integrated circuit is transmitted from the clock source to the corresponding functional circuit, and a load of the corresponding functional circuit; and
wherein the clock generators are clock generators based on time-average-frequency direct period synthesis; and clock signals of the functional circuits are generated based on the clock signal of the integrated circuit, control words of the clock generators and initial phases of the functional circuits; and the integrated circuit further comprises a control circuit, which is configured to send acquired control words to each of the clock generators, respectively;
the initial phase of the corresponding functional circuit is determined based on a clock delay of a reference circuit and a clock delay of the corresponding functional circuit, and the reference circuit is one of the at least two functional circuits; and
the clock delay of the corresponding functional circuit is determined based on the transmission distance, over which the clock signal of the integrated circuit is transmitted from the clock source to the corresponding functional circuit, and the load of the corresponding functional circuit.
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