| CPC H03K 19/195 (2013.01) [G06F 1/10 (2013.01); G06N 10/20 (2022.01); G06N 10/40 (2022.01); H03K 19/1954 (2013.01); H03K 19/20 (2013.01)] | 20 Claims |

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1. A device, comprising:
a logic circuit comprising a clockless single flux quantum logic gate, wherein the clockless single flux quantum logic gate comprises:
a plurality of input ports, and an output port;
a plurality of dynamic storage loop circuits;
an output Josephson junction coupled to an output of each of the dynamic storage loop circuits and configured to drive the output port;
a plurality of isolation buffer circuits, wherein each isolation buffer circuit is coupled to a respective input port, and a respective dynamic storage loop circuit;
wherein each isolation buffer circuit comprises a Josephson junction that is configured to absorb a circulating current of an antifluxon without switching, which is injected into the respective dynamic storage loop circuit as a result of the output Josephson junction switching to generate a single flux quantum output pulse on the output port, to prevent the antifluxon from being output from the respective input port; and
wherein each isolation buffer circuit is configured to inject a fluxon into the respective dynamic storage loop circuit in response to a single flux quantum pulse applied to the respective input port, and annihilate an antifluxon that is present in the respective dynamic storage loop circuit.
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