US 12,231,109 B2
Electronic device with solder interconnect and multiple material encapsulant
Charles E. Carpenter, Apopka, FL (US); Howard Terry Glascock, Apopka, FL (US); Paul Stokes, Apopka, FL (US); and Thomas Scott Morris, Apopka, FL (US)
Assigned to Qorvo US, Inc., Greensboro, NC (US)
Filed by Qorvo US, Inc., Greensboro, NC (US)
Filed on Jun. 17, 2021, as Appl. No. 17/350,842.
Claims priority of provisional application 63/065,721, filed on Aug. 14, 2020.
Prior Publication US 2022/0052667 A1, Feb. 17, 2022
Int. Cl. H03H 9/05 (2006.01); H03H 3/02 (2006.01); H03H 9/02 (2006.01); H03H 9/08 (2006.01); H03H 9/10 (2006.01); H03H 9/17 (2006.01); H03H 9/56 (2006.01)
CPC H03H 9/0523 (2013.01) [H03H 3/02 (2013.01); H03H 9/02086 (2013.01); H03H 9/08 (2013.01); H03H 9/1007 (2013.01); H03H 9/173 (2013.01); H03H 9/564 (2013.01)] 19 Claims
OG exemplary drawing
 
1. An electronic device, comprising:
an electronic packaging substrate with conductor trace;
a first die comprising:
an electronic component; and
a solder interconnect electrically coupling the electronic component to the electronic packaging substrate; and
an encapsulant surrounding the first die and comprising:
a first dielectric material at a periphery of the electronic component and below the electronic component and adjacent to the solder interconnect, the first dielectric material being located at the periphery of the electronic component and having a first thickness;
a second dielectric material at a top of the first die, the second dielectric material having a second thickness less than the first thickness; and
a shield covering the encapsulant, the shield including a top wall positioned on the second dielectric material and a side wall that extends along a perimeter of the encapsulant and is attached to the encapsulant.