US 12,231,105 B2
Switchable termination resistance circuit
Guillaume Mouret, Portet-sur-Garonne (FR); and Alexis Nathanael Huot-Marchand, Labastidette (FR)
Assigned to NXP USA, Inc., Austin, TX (US)
Filed by NXP USA, INC., Austin, TX (US)
Filed on Apr. 4, 2023, as Appl. No. 18/295,540.
Claims priority of application No. 22305641 (EP), filed on Apr. 29, 2022.
Prior Publication US 2023/0353129 A1, Nov. 2, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. H03H 11/28 (2006.01); H03F 3/16 (2006.01)
CPC H03H 11/28 (2013.01) [H03F 3/16 (2013.01)] 12 Claims
OG exemplary drawing
 
1. A switchable termination resistance circuit for a transmission line transceiver, the switchable termination resistance circuit comprising:
first and second terminals for connection to a transmission line;
first and second NMOS termination resistance switches having source connections connected together at a midpoint node and gate connections connected to an input node;
a first resistor connected between the first terminal and a drain connection of the first NMOS termination resistance switch;
a second resistor connected between the second terminal and a drain connection of the second NMOS termination resistance switch;
a Zener diode having a cathode side connected to the input node and an anode side connected to the midpoint node; and
a branch comprising a second Zener diode, a branch diode, a branch NMOS switch and a branch PMOS switch in a series connected arrangement between the midpoint node and a ground line.