US 12,231,102 B2
Audio amplifier with embedded buck controller for class-G application
XiangSheng Li, Shenzhen (CN); and Ru Feng Du, Shenzhen (CN)
Assigned to STMicroelectronics (Shenzhen) R&D Co. Ltd., Shenzhen (CN)
Filed by STMicroelectronics (Shenzhen) R&D Co., Ltd., Shenzhen (CN)
Filed on Oct. 24, 2023, as Appl. No. 18/493,282.
Application 18/493,282 is a division of application No. 17/241,980, filed on Apr. 27, 2021, granted, now 11,831,286.
Application 17/241,980 is a division of application No. 16/695,010, filed on Nov. 25, 2019, granted, now 11,018,644, issued on May 25, 2021.
Claims priority of provisional application 62/771,967, filed on Nov. 27, 2018.
Prior Publication US 2024/0056046 A1, Feb. 15, 2024
This patent is subject to a terminal disclaimer.
Int. Cl. H03G 3/30 (2006.01); H03F 3/187 (2006.01); H04R 3/00 (2006.01); H04R 29/00 (2006.01)
CPC H03G 3/3005 (2013.01) [H03F 3/187 (2013.01); H04R 3/00 (2013.01); H04R 29/00 (2013.01); H03F 2200/03 (2013.01); H03G 2201/103 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method, comprising:
detecting a first peak amplitude in a first digital audio stream;
selecting an output voltage at an output terminal of a converter such that the output voltage is a lowest output voltage from a set of output voltages, the set of output voltages comprising a plurality of voltage output values and each having a value higher than the first peak amplitude plus a headroom voltage;
determining a first delay based on a settling time of the output voltage;
converting the first digital audio stream into an analog audio signal;
providing the analog audio signal to a speaker using a class-AB driver stage that receives power from the output terminal; and
causing the analog audio signal to delay by the first delay such that the analog audio signal is provided to the speaker after the output voltage settles.